NXP Semiconductors FXTH870 D Series, Manual

Page: 47 / 176

FXTH870xD
Sensors
Freescale Semiconductor, Inc.
45
Figure 29. General Purpose I/O Logic
The data direction control bit (PTxDDn) determines whether the output buffer for the associated pin is enabled, and also controls
the source for port data register reads. The input buffer for the associated pin is always enabled unless the pin is enabled as an
analog function.
When a shared digital function is enabled for a pin, the output buffer is controlled by the shared function. However, the data
direction register bit still controls the source for reads of the port data register.
When a shared analog function is enabled for a pin, both the input and output buffers are disabled. A value of 0 is read for any
port data bit where the bit is an input (PTxDDn = 0) and the input buffer is disabled. In general, whenever a pin is shared with
both an alternate digital function and an analog function, the analog function has priority such that if both the digital and analog
functions are enabled, the analog function controls the pin.
It is a good programming practice to write to the port data register before changing the direction of a port pin to become an output.
This ensures that the pin will not be driven momentarily with an old data value that happened to be in the port data register.
Table 32. Truth Table for Pullup and Pulldown Resistors
PTAPE[3:0]
(pull enable)
PTADD[3:0]
(data direction)
KBIPE[3:0]
(KBI pin enable)
KBEDG[3:0]
(KBI Edge Select)
Pullup Pulldown
0 0 x x disabled disabled
1 0 0 x enabled disabled
x 1 x x disabled disabled
1 0 1 0 enabled disabled
1 0 1 1 disabled enabled
PTBPE[1:0]
(pull enable)
PTBDD[1:0]
(data direction)
0 0 x x disabled x
1 0 x x enabled x
x 1 x x disabled x
PTxPEn
KBEDEy
KBIPGy
V
DD
PTxDn
RPU
RPD
PTxDDn
Write
PTxDn
Read
PTxPEn
KBEDGy
KBIPEy
KBI interrupt
KBACK
KBMOD
Port pin
PTA[3:0]
only
PTA[3:0]
only