Preliminary User’s Manual U17260EJ3V1UD
9
CONTENTS
CHAPTER 1 OUTLINE ............................................................................................................................ 17
1.1 Features .................................................................................................................................... 17
1.2 Applications ............................................................................................................................. 18
1.3 Ordering
Information ............................................................................................................... 19
1.4
Pin Configuration (Top View).................................................................................................. 23
1.5
78K0/Kx2 Series Lineup .......................................................................................................... 26
1.6 Block
Diagram .......................................................................................................................... 29
1.7
Outline of Functions ................................................................................................................ 30
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 32
2.1
Pin Function List...................................................................................................................... 32
2.2
Description of Pin Functions .................................................................................................. 36
2.2.1 P00
to
P06 (port 0).....................................................................................................................36
2.2.2 P10
to
P17 (port 1).....................................................................................................................37
2.2.3 P20
to
P27 (port 2).....................................................................................................................38
2.2.4 P30
to
P33 (port 3).....................................................................................................................38
2.2.5 P40
to
P43 (port 4).....................................................................................................................39
2.2.6 P50
to
P53 (port 5).....................................................................................................................39
2.2.7 P60
to
P63 (port 6).....................................................................................................................39
2.2.8 P70
to
P77 (port 7).....................................................................................................................39
2.2.9 P120
to
P124 (port 12)...............................................................................................................40
2.2.10 P130
(port 13) ............................................................................................................................40
2.2.11 P140,
P141 (port 14)..................................................................................................................41
2.2.12 AV
REF
.........................................................................................................................................41
2.2.13 AV
SS
...........................................................................................................................................41
2.2.14
RESET .......................................................................................................................................41
2.2.15 REGC.........................................................................................................................................41
2.2.16 V
DD
and EV
DD
.............................................................................................................................42
2.2.17 V
SS
and EV
SS
.............................................................................................................................42
2.2.18
FLMD0 .......................................................................................................................................42
2.3
Pin I/O Circuits and Recommended Connection of Unused Pins....................................... 43
CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 47
3.1 Memory
Space.......................................................................................................................... 47
3.1.1 Internal
program memory space ................................................................................................56
3.1.2
Memory bank (
µ
PD78F0536, 78F0537, and 78F0537D only)....................................................58
3.1.3 Internal
data memory space.......................................................................................................58
3.1.4 Special
function
register (SFR) area ..........................................................................................59
3.1.5 Data
memory addressing ...........................................................................................................59
3.2 Processor
Registers ................................................................................................................ 67
3.2.1 Control
registers.........................................................................................................................67
3.2.2 General-purpose registers .........................................................................................................71
3.2.3 Special
function registers (SFRs)...............................................................................................72
