CHAPTER 24 LOW-VOLTAGE DETECTOR
Preliminary User’s Manual U17260EJ3V1UD
550
Figure 24-8. Timing of Low-Voltage Detector Interrupt Signal Generation
(Detects Level of Input Voltage from External Input Pin (EXLVI))
Input voltage from
external input pin (EXLVI)
V
EXLVI
Time
<1>
Note 1
<7> Cleared by software
LVIMK flag
(set by software)
LVIF flag
INTLVI
LVIIF flag
<3>
<5>
<6>
Cleared by software
<4> Wait time
LVION flag
(set by software)
Note 2
Note 2
LVISEL flag
(set by software)
<2>
LVIMD flag
(set by software)
L
<8>
Note 2
Notes 1.
The LVIMK flag is set to “1” by reset signal generation.
2.
The interrupt request signal (INTLVI) is generated and the LVIF and LVIIF flags may be set (1).
Remark
<1> to <8> in Figure 24-8 above correspond to <1> to <8> in the description of “When starting
operation”
in
24.4.2 (1) When detecting level of supply voltage (V
DD
)
.