98
13-2-7. Input/Output equivalent circuit
13-2-8. Timing chart
(1) Normal
At the time of data output of all the P.C., DATA and POL., the output transistor becomes ON. (negative logic
electrically).
(2) When a data is over.
At the time of OVER output, the output transistor of OVER signal becomes ON. (negative logic electrically) Also,
at the time of OVER output, the all of the DATA of output transistor become OFF condition. (Positive logic
electrically) (However, the POL becomes OFF at the time of plus over, and becomes ON at the time of minus
over.)
Input section
Output section
V
CE
= DC30 V
I = DC20 mA MAX
INPUT
COM.
+5 V
OUTPUT
COM.
2.2K
200
3300
P
2.2K
0.1U
DATA
POL.
P.C.
ON ON
ON
ON
ON
ON
ON
ON
At 5 times/s
：
Changeable to Approx. 125 ms/approx.25 ms
15 times/s
：
Approx.25 ms
5 times/s
：
Approx.200 ms
15 times/s
：
Approx.66 ms
DATA
POL.
P.C.
OVER
ON
ON
ON
ON
ON
ON ON
Summary of Contents for CSD-401
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