STE User’s Manual
Remote Control Operations
Rel. 2.6
8-21
Table 8-6. S-Register Summary
Register Description
S28
a. S28 is bit mapped to store the options listed below:
Bit Option
Value
0
Full/Half Duplex
0 = Full Duplex *
1 = Half Duplex
2-1
Signaling Mode Selection
00 = automatic signaling if on
ISDN or
PSTN; STU signaling if on
TRI-TAC or BDI*
01 – Illegal
10 = STU signaling if on ISDN or
PSTN; illegal for other
networks
11 – SCIP signaling if on ISDN,
PSTN, TRI-TAC; illegal for
other networks
3 Reserved
0
4 Reserved
0
5
Mode Supported
0 = Illegal
1 = Secure Data *
6
On-Line State
0 = Asynchronous
*
1 = Synchronous
7 Reserved
0
*
= Factory Default
b. The terminal writes to register S28 to set its default state.
c. Bit 0 indicates Full Duplex (0) or Half Duplex (1) and is set by the DTE to control terminal
call setup. This bit is ignored by the terminal when it is operating in a mode (network or
signaling) when both full and half-duplex are not supported.
d. Bit 5 is set by the terminal to 1 to indicate that it supports secure data mode. This bit
cannot be changed by the DTE. This bit is ignored (no error is returned) by the terminal
when the DTE writes to the register.
e. Bit 6 (Async/Sync) indicates the On-line State the terminal will enter on the next data call
setup or the state it is in if it is currently on-line. A "0" indicates Asynchronous State and
is set by the “AT&M0” command. A “1” indicates the Synchronous State and is set by
the “AT&M1” command.
f. The default value for S28 is 32 (20 hex). Asynchronous, Secure Data, Full Duplex.
g. If an attempt is made to set bits 3, 4, or 7 (reserved bits) to “1”, send the error result code
to the DTE and leave the register unchanged.
h. If an attempt is made to set bit 6 to “0” (Asynchronous Mode) when the value in S27 is a
synchronous only rate (56000, 64000, 112000, or 128000), send the error result code to
the DTE and the leave the register unchanged.
i. If an attempt is made to set bit 6 to 1 (synchronous mode) when the value in S27 is an
asynchronous only rate (115200), send the error result code to the DTE and leave the
register unchanged.
j. If an attempt is made to set bits 1, 2 and/or 6 that results in setting bit 6 to 1
(synchronous mode) and bits 1 and 2 to 11 (SCIP signaling) when not configured for
ISDN with VBSCT enabled, send the error result code to the DTE and leave the register
unchanged.
Summary of Contents for CEU
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