IBM 3745 Series, Hardware Maintenance Reference

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Hard Stop Transmit Command
On reception of this command, the hardware:
Ÿ Stops transmitting data.
Ÿ
Stops any transmit DMA transfer in process.
Ÿ Puts the line at mark.
Receive Operation
Microcode Functions
The microcode:
Ÿ
Handles NCP receive commands through PIO operations on the IOC bus.
Ÿ Gets receive parameters from the NCP.
Ÿ Sends receive status from/to the NCP through data management exchanges on the DMA bus.
Ÿ
Prepares the receive control word (CW) for the FESH:
– The CSP cycle steals the storage address of the received SDLC frame address/control fields.
– If a non-I frame is to be transmitted, the number of bytes of the A/C field is indicated(4 bytes
maximum).
Ÿ Indicates to the FESH (external register setting) the:
– Transmission coding mode (NRZI or non-NRZI) at set mode
– Start of receive command
– Receive continue command
– Stop of receive operation command
– Flush command.
FESH Hardware Functions
Receive Command
When the FESH is enabled it always:
Ÿ Monitors for flag (flush other characters).
Ÿ Performs address compare.
Ÿ On flag recognition, starts accumulating received characters in the receive queue buffer.
Ÿ
Performs zero deletion.
Ÿ
Performs CRC accumulation (The two CRC characters are not stored in the receive queue buffer).
Ÿ On flag recognition, checks the CRC.
Ÿ Stores the receive ending conditions in the receive queue buffer and then in external register X'10' for
the microcode:
– End of receive CRC OK
– End of receive CRC bad
– Flag OFF boundary
– Abort (not followed by idle)
– Idle
– Overrun.
Ÿ
Accumulates multiple frames in the receive buffer queue.
Ÿ If receive queue full:
– Indicates overrun as ending condition in receive queue.
– Flushes further incoming characters of the frame on which the overrun occurred.
– Ignores subsequent data and flags until the CSP issues a receive command.
Chapter 5. High Performance Transmission Subsystem (HPTSS)
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