IBM 3745 Series, Hardware Maintenance Reference

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Ÿ Loop bit OFF:
– An initial character sequence (7 characters maximum) prepared by the microcode at initialization
time.
– Then, the SDLC frame with the receipt of the transmit command (Refer to the "Transmit
Command" on the next paragraph).
Ÿ
Loop bit ON:
– The initial character sequence (7 characters maximum)
– Then sends the last two characters of the sequence continuously until the microcode sets the start
transmit command or the stop transmit command (used by the X.21 wrap command from the CSP
to the FESH).
Transmit Command
On reception of a start transmit command, the FESH transmit layer cycle steals
the transmit control word prepared by the microcode in CSP storage.
:
When the control word is loaded,
the transmit byte layer:
Ÿ
For SDLC, cycle steals the A/C fields prepared by the microcode in CSP storage.
Ÿ If the SDLC frame contains A/C fields only, the transmit byte layer starts the transmission.
Ÿ If the SDLC frame contains an I-field, the FESH begins a DMA operation to load the I-field from the
CCU storage to the FESH RAM via the DMA bus.
Ÿ For frame relay, begin a DMA operation to load the transmit data from the CCU storage to the FESH
RAM via the DMA bus.
Note: The maximum size of an A/C field is four bytes.
The bit layer machine and the byte layer machine operations are overlapped so that the transmission of
data can continue while data is being obtained from the CCU via the DMA interconnection.
This overlap of operations continues until a zero buffer pointer is detected.
Ÿ
When a zero buffer pointer is detected the bit layer instructs the front-end to send the CRC and
ending flag, followed by the ending sequence specified at set mode (line at mark or continuous flags).
Ÿ
If frame relay, look for another frame to transmit. If there is one, continue as if starting a new frame.
Continue as in the previous bullet until all frames are transmitted.
Ÿ
The byte layer also sets the end of transmit bit in the transmit status register and generates a level 2
interrupt to the CSP.
During the transmission over the line, the hardware may detect that no data has been loaded in the
external RAM whereas the FESH bit layer requests a new buffer (DMA transfer up to the buffer count not
completed), in that case the hardware:
Ÿ Sets the underrun and the end transmit bits in the transmit status register.
Ÿ Raises a level 2 interrupt to the CSP.
Ÿ
Sends the transmission error sequence initialized at set mode.
Soft Stop Transmit Command
On reception of this command, the hardware:
Ÿ Stops transmitting the data.
Ÿ Stops any transmit DMA transfer in process.
Ÿ Sends the transmission error sequence initialized at set mode.
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IBM 3745 Models 130, 150, 160, 170, and 17A: Hardware Maintenance Reference