IBM 3745 Series, Hardware Maintenance Reference

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Transmit/Receive Data Mechanism
LIC
┌─────────────────────────────────┐
DMUX │ ┌─┐ │
┌─────┐ │ ─┘ └─ │
┌───┐ ┌┐┌┐┌┐┌┐ │┌───┐│ ┌─┐ ┌─┐ │┌────────────┐ ┌─┐ ┌────────────┐│ ┌─┐ ┌─┐ ┌───┐
│
│─┘└┘└┘└┘└─ ││ ││──┘ └─┘ └──││High-speed │─┘ └─│ Low-speed ││ ─┘ └─┘ └ │ │ / /
│FES├───────────┤│MUX├┼───────────┼┤serializer/ │ ┌─┐ │serializer/ ├┼───────────┤DCE├────
│
│Manchester ││ ││In/outbound││deserializer│─┘ └─│deserializer││ CCITT │ │ Telephone
└───┘encoded │└───┘│ │└────────────┘ ┌─┐ └────────────┘│ interface └───┘ line
Serial link│ │ │ ─┘ └─ │
│ │ │ ┌─┐ │
│ │ │ ─┘ └─ │
│ ┌─┐ │
│ ─┘ └─ │
└─────────────────────────────────┘
A
│
5 data bits plus
1 delimiter
The data is passed from/to the FES to the telecommunication line via the MUX and
LIC as shown above.
The LIC communicates with the FES to:
Ÿ
Request new data to be transmitted (when in transmit mode)
Ÿ
Signal 'transmit overrun/underrun': 'LIC line error register bit 3' (when in
transmit mode)
Ÿ Signal 'overrun': 'LIC line error register bit 2' if more than 5 data bits are
received between two serial link requests (when in receive mode).
LIC Reset
See also “DMUX Reset” on page 4-37.
The purpose of the LIC reset command is to isolate the LIC from the LIC bus and
from the attached lines (DMUX card provides one reset lead per LIC).
Ÿ
At power ON, all leads are activated during the power ON reset, until the
DMUX detects a start pattern from the FESA.
Ÿ After power ON, one reset lead may be activated on request, to reset the logic
in the corresponding LIC and to disable all the line interface drivers.
– In the reset state, no information can be exchanged with this LIC.
– Any command to a LIC in reset state ends with a LIC check at the
FES-FESA interconnection.
Line Enable/Disable
When a line is enabled, it accepts read/write operations as well as data
transmission/reception and DCE interface handling.
4-44
IBM 3745 Models 130, 150, 160, 170, and 17A: Hardware Maintenance Reference