Circuit design
I/O lines PA0~PA7, PB0~PB7 and PC0~PC3 are defined as outputs. Port A
is defined as the low order bits while Port B is defined as the high order
bits. Port C is for the control lines. To use in a practical application it is
necessary to connect both the address and data lines of the SRAM to the
ROM socket of the application.
HT-IDE User’s Guide
220
Summary of Contents for HT-IDE
Page 11: ...P a r t I Integrated Development Environment Part I Integrated Development Environment 1 ...
Page 12: ...HT IDE User s Guide 2 ...
Page 20: ...Fig 1 6 Fig 1 7 HT IDE User s Guide 10 ...
Page 24: ...HT IDE User s Guide 14 ...
Page 70: ...HT IDE User s Guide 60 ...
Page 76: ...HT IDE User s Guide 66 ...
Page 92: ...HT IDE User s Guide 82 ...
Page 93: ...P a r t I I Development Language and Tools Part II Development Language and Tools 83 ...
Page 94: ...HT IDE User s Guide 84 ...
Page 148: ...HT IDE User s Guide 138 ...
Page 150: ...Fig 12 1 Fig 12 2 HT IDE User s Guide 140 ...
Page 154: ...HT IDE User s Guide 144 ...
Page 192: ...HT IDE User s Guide 182 ...
Page 194: ...HT IDE User s Guide 184 ...
Page 218: ...HT IDE User s Guide 208 ...
Page 235: ...P a r t V Appendix Part V Appendix 225 ...
Page 236: ...HT IDE User s Guide 226 ...
Page 250: ...HT IDE User s Guide 240 ...