Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
63
Copyright © 2015 Future Technology Devices International Limited
2.9
IOMUX
The IOMUX allows any peripheral interface input or output signal to be assigned to any of the
available IO pins. There are however some limitations:
Digital interfaces (SPI, I2C, UART, etc.) should be assigned to one of the Digital IO Pads.
However, the digital interfaces can be mapped to the analogue pads if required.
Analogue signals (ADC) must be mapped to the Analogue IO Pads.
In order to assign a signal to a particular pin, two register writes are required to select the signal
and select the pad. Pads are routed to specific IC pins depending on the IC package selected.
Pads are described in Section 2.9.6 and Input and Output signals are described in Sections 2.9.8
and 2.9.7 respectively.
The registers associated with the IOMUX are outlined in Table 2.74.
I/O
Address
Register Name
Description
0x40
Used to enable and reset the IOMUX
0x41
Used to route an output signal to a
specific pad
0x42
Used to select a pad for a specific
output signal
0x43
Used to route an input signal from a
specific pad
0x44
Used to select pad to be used with a
specific input signal
Table 2.74 IOMUX Register Addresses
2.9.1
IOMUX_CONTROL
Bit
Position
Bit Field Name
Type
Reset
Description
7..2
Reserved
RFU
0
Reserved
1
iomux_dev_en
R/W
0
Write 1 to Enable IOMUX
0
iomux_soft_reset
R/W
0
Write 1 to Reset IOMUX
Table 2.75 IOMUX Control Register
The IOMUX Control register provides top-level enables and reset functions for the IOMUX module.
The IOMUX module is enabled by setting the
iomux_dev_en
bit to 1. Clearing this bit will disable the
module.
To reset the module, a 1 is written to the
iomux_soft_reset
bit. This is cleared when the reset is
performed and will therefore always read as ‘0’.
