Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
113
Copyright © 2015 Future Technology Devices International Limited
For clarification, follow this example.
Specify the PWM Pre-scaler to divide the FT51A System Clock to get the 1MHz PWM clock.
Next, set the PWM counter, for example, to the maximum value of 0xFFFF. Hence, the time it
takes to reach value 0xFFFF is equal to 1us * 0xFFFF = 65535us. In brief, the duration (width) of
the PWM pulse is influenced by two parameters: PWM Clock and PWM Counter, giving two extreme
situations (min and max):
1 - (assuming the 48MHz FT51A System Clock) Set the PWM Clock to its maximum value of 48MHz
and increment PWM counter only by one to get the PWM pulse of roughly 20ns.
PWM Clock = 48MHz;
PWM Counter = 1;
PWM Pulse Duration = 20ns
2a - (assuming the 48MHz FT51A Clock) Set the PWM Clock to its minimum value of 187.5kHz
(assuming the 48MHz FT51A Clock) and increment PWM counter by 65535 to get the PWM pulse of
roughly 349.52ms.
PWM Clock = 187.5kHz;
PWM Counter = 65535;
PWM Pulse Duration = 349.52ms
2b - (assuming the 6MHz FT51A Clock) Set the PWM Clock to its minimum value of 23.437kHz and
increment PWM counter by 65535 to get the PWM pulse of roughly 2.8s.
PWM Clock = 23.437kHz;
PWM Counter = 65535;
PWM Pulse Duration = 2.8s
Hence the ranges become:
System Clock [MHz]
PWM Clock
PWM Pulse Duration
Min [Hz]
Max [MHz]
Min [ns]
Max [s]
48
187500
48
20.8ns
0.34952s
24
93750
24
41.6ns
0.69904s
12
46875
12
83.3ns
1.39808s
6
23437
6
166.6ns
2.79622s
Table 2.149. PWM Ranges
To specify the width of a specific PWM pulse, set the comparators at times required and enable
them by the toggle register. The following sets the width from 0 to 0xAAFF.
Note: The toggle register number relates to the PWM number assigned via IOMux.
