Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
141
Copyright © 2015 Future Technology Devices International Limited
3.1.3
DMA Library
The UART, 245 FIFO and SPI interfaces can send/receive data directly to/from RAM without the
intervention of the 8051 core using the DMA controller. It can also send data around RAM without
using a peripheral interface.
This library provides functions to configure these fixed-size transfers and also continuous reads,
where each byte arriving at an interface is copied into a First-In-First-Out buffer in data memory.
After initialisation, one of the 4 DMA engines can be acquired with DMA_acquire(). The function
returns one of the 4 engines. If there are no engines free then it will return an error.
The engine must then be configured with DMA_configure() to be push, pull or FIFO. The configure
function also specifies either a memory or I/O address to use as source or sink locations and the
length of the transfer.
Once configured, the DMA_enable() command will set a DMA engine to run to complete the
transfer. As this does not block until completion the DMA_wait_on_complete() call is used to wait
until the transfer is finished.
When the DMA engine is no longer required then DMA_release() will allow the DMA engine to be
used again.
Source Folder: dma
3.1.3.1
DMA_initialise
File: ft51_dma_initialise.c
Requires: ft51_interrupts.c
Initialise the DMA controller. This must be called before any other DMA operation.
3.1.3.2
DMA_acquire
File: ft51_dma_acquire.c
Request a DMA engine to use. This will call calloc() to allocate memory from the heap.
3.1.3.3
DMA_configure
File: ft51_dma_configure.c
Configure a DMA engine source and destination addresses, transfer length, mode and flow control
method. The source and destination addresses may be registers or memory addresses.
The mode is one of push or pull. FIFO mode is configured with the DMA_configure_fifo() function.
3.1.3.4
DMA_enable
File: ft51_dma_enable.c
Start a DMA engine to run until the transfer is complete. FIFO DMAs will run indefinitely.
3.1.3.5
DMA_disable
File: ft51_dma_disable.c
Stop a DMA engine when a transfer is incomplete.
3.1.3.6
DMA_wait_on_complete
File: ft51_dma_wait_on_complete.c
Wait until a DMA engine has completed its transfer.
3.1.3.7
DMA_configure_fifo
File: ft51_dma_configure_fifo.c
