Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
11
Copyright © 2015 Future Technology Devices International Limited
#define
WRITE_IO_REG(address, data) \
do
\
{ \
IO_ADDR_9_H = (
unsigned
char
)((
unsigned
int
)(address) >> 8); \
IO_ADDR_9_L = (
unsigned
char
)(address); \
IO_DATA_9 = (data); \
} \
while
(0)
#define
READ_IO_REG(address, data) \
do
\
{ \
IO_ADDR_9_H = (
unsigned
char
)((
unsigned
int
)(address) >> 8); \
IO_ADDR_9_L = (
unsigned
char
)(address); \
(data) = IO_DATA_9; \
} \
while
(0)
2.1.3
Register Descriptions
The hardware and peripheral descriptions in this chapter include register maps which define the
initial state of the registers, their behaviour and provide a description of the bit fields.
Bit type is the behaviour of the bit when accessed. It can be read only, read and write or write to
clear. The mnemonics used in this chapter are defined in Table 2.3.
Type
Definition
R
Read Only
R/W
Read/Write
W1C
Write ‘1’ to Clear
RFU
Reserved for Future Use
W1T
Write ‘1’ to Trigger, Reads as ‘0’
Table 2.3 Register Bit Type Definitions
The initial state of each register is given in the Reset column of the register descriptions.
