Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
109
Copyright © 2015 Future Technology Devices International Limited
2.12.2
PWM_INT_CTRL
Bit
Position
Bit Field Name
Type
Reset
Description
7..6
Reserved
RFU
0
Reserved
5
pwm_int
R/W
0
PWM interrupt
4
pwm_int_ien
R/W
0
PWM interrupt enable
3
pwm_busy
R
0
PWM busy
2
pwm_trigger_en_1
R/W
0
PWM trigger enable: 00 disabled,
01 positive edge, 01 negative edge
11 any edge
1
pwm_trigger_en_0
R/W
0
0
pwm_en
R/W
0
PWM enable connected to Control
block.
Table 2.137 PWM Ctrl 1 Register
This register allows enabling and detecting PWM interrupt, PWM busy, and setting up the trigger
edge.
2.12.3
PWM_PRESCALER
Bit
Position
Bit Field Name
Type
Reset
Description
7..0
prescaler
R/W
0
8-bit prescaler value
Table 2.138 PWM Prescaler Register
This is a programmable counter that reduces the frequency of the system clock to the desired
frequency. The pre-scaler is shared by all 8 PWM channels.
2.12.4
PWM_CNT16_LSB
Bit
Position
Bit Field Name
Type
Reset
Description
7..0
cnt16_lsb
R/W
0
LSB of a 16-bit counter value
Table 2.139 PWM Counter LSB Register
This is a LSB part of a programmable counter that determines the period of the PWM signal.
The input clock is from the pre-scaler block. The 16 bit counter is shared by all 8 PWM channels.
