Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
13
Copyright © 2015 Future Technology Devices International Limited
2.2.1
DEVICE_CONTROL_REGISTER
Bit
Position
Bit Field Name
Type Reset Description
7..2
RFU
R
0
Reserved
1
top_dev_en
R/W
0
This bit MUST be set to allow
write access to all top-level
registers.
0
top_soft_reset
R/W
0
When set will cause a reset of
the entire device. This bit will
always read as zero
Table 2.5 Device Control Register
The Device Control register provides top-level write enable and reset functions for all top-level
registers on the FT51A device. This encompasses only the registers described in this chapter and
not any 8051 core registers or other module’s registers.
Write access to the top-level registers is enabled by setting the
top_dev_en
bit to 1. Clearing this
bit will disable write access.
To reset all top-level registers, a 1 is written to the
top_soft_reset
bit. The module clears this bit
when a reset is performed and will therefore always read as ‘0’.
