ADuCM310 Hardware Reference Manual
UG-549
Rev. C | Page 37 of 192
The 11-bit DAC and the 5-bit DAC are guaranteed monotonic as individual DACs. However, when combined, there is mismatch between
the bit weightings of the two DACs; therefore, when combined, they are not monotonic and not even 12-bit monotonic. Nonlinearity
errors occur at certain major code transitions.
To improve the linearity performance when combining the two DACs, the following happens during production testing:
•
The ATE production test measures the IDAC output at each of the known major code transitions that log the nonlinearity errors for
IDAC0 to IDAC5 on every device.
•
The ATE production test logs the correction factor to flash tables beginning at Address 0x40980 to Address 0x40BEF.
•
The correction factors are effectively an adjustment of the 5-bit DAC to make a single, linear 14-bit DAC output.
•
The tables are organized in three parts for each IDAC:
•
Correction values for IDACxDAT[27:23], or the five MSBs of the 11-bit DAC.
•
Correction values for IDACxDAT[22:21], or Bits[6:5] of the 11-bit DAC.
•
Correction values for IDACxDAT[20:17], or the 4 LSBs of the 11-bit DAC.
•
The following is an example of how to define a structure for this table in source code.
typedef struct
{ /*IDAC correction structure */
unsigned short pusErr5[6][32]; /*Top 5 bits correction array. */
unsigned short pusErr2[6][4]; /*Next 2 bits correction array. */
unsigned short pusErr4[6][16]; /*Next 4 bits correction array. */
} IDACCOR_TypeDef;
#define pIDACCOR ((IDACCOR_TypeDef *)0x40980)
•
The correction factor is the value that must be added or subtracted from the ideal value for the IDACxDAT register to generate the
required output current.
The ideal value is the IDACxDAT value if the output transfer function had no nonlinearity errors.
For example, setting IDAC2 to 12.527 mA, the ideal 14-bit value to write to the IDAC is 0x2815. (12.527/20 × FS). It is assumed the 14-bit
value is comprised of the full 11-bits of the 11-bit IDAC plus the lower 3-bits of the 5-bit IDAC. The 11-bit IDAC is comprised of three
sub-DACs. Therefore, when correcting for example IDAC0, three lookup tables are required.
Working with the ideal value first, take the following steps:
1.
Identify the ideal 14-bit value first and subtract the worst-case error from this (0x20), assuming that the ideal 14-bit value is >0x20.
2.
Index correction factor table for Bits[13:9]. This involves reading the correct entry in the first lookup table to correct 5 MSBs (10:6) of
the 11-bit DAC. For example:
iErr = pIDACCOR->pusErr5[iChan][(iVal>>9)&0x1f];
3.
Index correction factor for Bits[8:7]. This involves reading the correct entry in the second lookup table for Bits[5:4]of the 11-bit DAC.
For example:
iErr += pIDACCOR->pusErr2[iChan][(iVal>>7)&3];
4.
Index correction factor for Bits[6:3]. This involves reading the correct entry in the third lookup table for Bits[3:0]of the 11-bit DAC.
For example:
iErr += pIDACCOR->pusErr4[iChan][(iVal>>3)&0xf];
5.
Compute the final error correction value (see the following example).
6.
Add the final error to the IDACxDAT register.
