UG-549
ADuCM310 Hardware Reference Manual
Rev. C | Page 24 of 192
For increased accuracy, perform a two-point calibration at a controlled temperature value.
The values used in this example for V
TREF
and K are not guaranteed values. The values V
TREF
and K vary from device to device; therefore,
the user must derive the appropriate values by performing a calibration at ambient temperature.
IDAC Channels
The
allows the voltage on the IDAC output pins to be selected as inputs to the ADC for debug purposes.
Take care when selecting the SOA IDAC (IDAC6) as the ADC input; it must never be selected when the SOA shutdown circuit is enabled
(sink current source enabled, HVCON[3] = 1).
Applying a negative voltage less than −0.3 V to ADC MUX results in a latch-up condition that is outside the absolute maximum input
voltage ratings to the low voltage analog die.
To select the SOA IDAC as an ADC input, HVCON[0] must be set to 1.
AV
DD
/2 and IOV
DD
/2 Supply Voltage Channels
These supply voltage channels are measured via internal resistor dividers. Because the resistors used are high impedance and the divided
voltage is not buffered, a slower ADC update rate must be used.
The ADC automatically changes the ADC update rate to 80 kSPS when the temperature sensor, AV
DD
/2, or IOV
DD
/2 input channels are
selected.
If a different ADC sampling rate is required for other channels after the conversion on any of these three channels is completed, the
ADCCNVC register must be updated.
Note that when the sequencer is enabled and includes any of these three channels, the value in the ADCCNVC register does not change
and the ADC sampling rate does not change. At rates above 80 kSPS, the accuracy is reduced if the input buffer is disabled.
ADC SUPPORT CIRCUITS
ADC Offset and Gain Calibration
For ADC offset calibration, ADCOF[13:0] provides a 14-bit offset calibration. The default value is 0x2000. The calibration resolution is ¼
of the ADCDAT LSB resolution. Therefore, if the 2.505V internal reference is used, the LSB resolution of ADCDAT is ~38.225 µV. In this
case, the ADCOF LSB resolution is 9.556 µV.
When performing an offset calibration, apply 0 V to the analog input channel when the input buffer is disabled. If the input buffer is
enabled, apply 150 mV.
Similarly, for ADC gain calibration, ADCGN[13:0] provides a 14-bit gain calibration. The default value is 0x2000. The calibration
resolution is ¼ of the ADCDAT LSB resolution. Therefore, if the 2.5 V internal reference is used, the LSB resolution of ADCDAT is
again~38.225 µV, ADCGN LSB resolution is 9.556 µV. When performing a gain calibration, apply a voltage close to full-scale to the
analog input channel. For example, if 2.505 V is the required full-scale value, apply 2.5 V to the input.
ADC Digital Comparator
A digital comparator is provided to allow an interrupt to be triggered if the ADCDAT4 result is above or below a programmable threshold.
Note that only external input channel AIN4 can be used with the digital comparator.
To set up the ADC digital comparator, note the following:
•
ADCCMP[17:2] are set a 16-bit ADC threshold value. This value is compared with ADCDAT4[27:12].
•
ADCCMP[1] configures the comparator to be triggered when the ADC result is above or below the trigger value.
•
To enable the ADC comparator interrupt, set INTSEL[2] = 1 to enable the digital comparator to the Low Voltage Die Interrupt 1 signal.
•
Similarly, set INTSEL[10] = 1 to enable the digital comparator interrupt to the Low Voltage Die Interrupt 0 signal.
•
The comparator output is asserted when the value in ADCDAT4[27:12] rises above the value in ADCCMP[17:2] if ADCCMP[1] = 1.
If ADCDAT4[27:12] remains above ADCCMP[17:2], no further comparator interrupts occur. The interrupt only occurs when the
comparator circuit detects a rise above the threshold.
•
Similarly, if ADCCMP[1] = 0, the comparator output is asserted when the value in ADCDAT4[27:12] falls below the value in
ADCCMP[17:2]. If ADCDAT4[27:12] remains below ADCCMP[17:2], no further comparator interrupts occur. The interrupt only
occurs when the comparator circuit detects a fall below the threshold value.
