NOVA electronics Inc. MCX514 -
253
－
253
－
10.2
AC Characteristics
(T
ＯＰＲ
= -40
～+85℃
, V
ＤＤ
= +3.3V±10%, Output load condition
：
D15
～
D0, INTN
：
85pF, SDA
：
400pF, Others
：
50pF)
10.2.1 Clock
CLK
t
CYC
t
WH
t
WL
■
CLK Input Signal
Symbol
Item
Min.
Typ.
Max.
Unit
tCYC
CLK Cycle
50
62.5
nS
tWH
CLK Hi Level Width
15
nS
tWL
CLK Low Level Width
15
nS
10.2.2 Read / Write Cycle
The figure shown above is used for 16-bit data bus accessing (H16L8 = Hi). For 8-bit data bus (H16L8 = Low), the address signals
shown in the figure become A3~A0, and data signals become D7~D0.
Symbol
Item
Min.
Max.
Unit
tAR
Address Setup Time
( to RDN
↓
)
0
nS
tCR
CSN Setup Time
( to RDN
↓
)
0
nS
tRD
Output Data Delay Time
(from RDN
↓
)
21
nS
tDF
Output Data Hold Time
(from RDN
↑
)
0
12
nS
tRC
CSN Hold Time
(from RDN
↑
)
0
nS
tRA
Address Hold Time
(from RDN
↑
)
3
nS
tAW
Address Setup Time
( to WRN
↓
)
0
nS
tCW
CSN Setup Time
( to WRN
↓
)
0
nS
tWW
WRN Low Level Pulse Width
30
nS
tDW
Setup Time of Input Data
( to WRN
↑
)
10
nS
tDH
Hold Time of Input Data
(from WRN
↑
)
0
nS
tWC
CSN Hold Time
(from WRN
↑
)
0
nS
tWA
Address Hold Time
(from WRN
↑
)
4
nS
