73
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U15798EJ2V0UD
Table 3-3. Special Function Register List (3/3)
Address
Special Function Register (SFR) Name
Symbol
R/W
Manipulatable Bit Unit
After Reset
1 Bit
8 Bits 16 Bits
FF90H
LCD display mode register 3
LCDM3
R/W
√
√
—
00H
FF91H
LCD clock control register 3
LCDC3
R/W
—
√
—
00H
FF92H
Static/dynamic display switching register 3
SDSEL3
R/W
—
√
—
00H
FF94H
LCD gain adjust register 0
VLCG0
R/W
√
√
—
00H
FFA0H
Asynchronous serial interface mode register 0
ASIM0
R/W
√
√
—
00H
FFA1H
Asynchronous serial interface status register 0
ASIS0
R
—
√
—
00H
FFA2H
Baud rate generator control register 0
BRGC0
R/W
—
√
—
00H
FFA4H
IIC control register 0
Note 1
IICC0
R/W
√
√
—
00H
FFA5H
IIC status register 0
Note 1
IICS0
R
√
√
—
FFA6H
IIC transfer clock select register 0
Note 1
IICCL0
R/W
√
√
—
FFA7H
Slave address register 0
Note 1
SVA0
—
√
—
FFA8H
IIC function expansion register 0
Note 1
IICX0
√
√
—
FFAFH
Serial operation mode register 3
CSIM3
R/W
√
√
—
00H
FFB0H
Serial operation mode register 1
CSIM1
R/W
√
√
—
00H
FFB1H
Serial clock select register 1
CSIC1
R/W
√
√
—
10H
FFE0H
Interrupt request flag register 0L
IF0
IF0L
R/W
√
√
√
00H
FFE1H
Interrupt request flag register 0H
IF0H
R/W
√
√
00H
FFE2H
Interrupt request flag register 1L
IF1L
R/W
√
√
—
00H
FFE4H
Interrupt mask flag register 0L
MK0
MK0L
R/W
√
√
√
FFH
FFE5H
Interrupt mask flag register 0H
MK0H
R/W
√
√
FFH
FFE6H
Interrupt mask flag register 1L
MK1L
R/W
√
√
—
FFH
FFE8H
Priority specification flag register 0L
PR0
PR0L
R/W
√
√
√
FFH
FFE9H
Priority specification flag register 0H
PR0H
R/W
√
√
FFH
FFEAH
Priority specification flag register 1L
PR1L
R/W
√
√
—
FFH
FFF0H
Memory size switching register
Note 2
IMS
R/W
—
√
—
CFH
FFF4H
Internal expansion RAM size switching register
Note 3
IXS
R/W
—
√
—
0CH
FFF9H
Watchdog timer mode register
WDTM
R/W
√
√
—
00H
FFFAH
Oscillation stabilization time select register
OSTS
R/W
—
√
—
04H
FFFBH
Processor clock control register
PCC
R/W
√
√
—
04H
Notes 1.
µ
PD780344Y, 780354Y Subseries only
2.
Although the default value of this register is CFH, set the value corresponding to each product as
indicated below.
µ
PD780343, 780353, 780343Y, 780353Y: 46H
µ
PD780344, 780354, 780344Y, 780354Y: 48H
µ
PD78F0354, 78F0354Y: C8H or value for mask ROM version
3.
Although the default value of this register is 0CH, use this register with a setting of 0BH.
Содержание mPD780344 Series
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