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CHAPTER 5 CLOCK GENERATOR
User’s Manual U15798EJ2V0UD
5.5.1 Main system clock operations
When the system operates on the main system clock (with bit 5 (CLS) of the processor clock control register (PCC)
set to 0), the following operations are carried out by setting PCC.
(a) Because the operation guaranteed instruction execution speed depends on the power supply voltage, the
minimum instruction execution time can be changed by bits 0 to 2 (PCC0 to PCC2) of PCC.
(b) While the clock generator is operating on the main system clock, main system clock oscillation is stopped (see
Figure 5-8 (1)
) if bit 4 (CSS) of PCC is set to 1, the subsystem clock operation is started (CLS = 1), and then
bit 7 (MCC) of PCC is set to 1.
(c) If bit 7 (MCC) of the PCC is set to 1 when operated with the main system clock, the main system clock oscillation
does not stop. When bit 4 (CSS) of the PCC is set to 1 and the operation is switched to subsystem clock operation
(CLS = 1) after that, the main system clock oscillation stops (see
Figure 5-8 (2)
).
Figure 5-8. Main System Clock Stop Function
(1) Operation when MCC is set after setting CSS with main system clock operation
(2) Operation when CSS is set after setting MCC with main system clock operation
MCC
CSS
CLS
Main system clock oscillation
Subsystem clock oscillation
CPU clock
Oscillation
does not stop.
MCC
CSS
CLS
Main system clock oscillation
Subsystem clock oscillation
CPU clock
Содержание mPD780344 Series
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