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CHAPTER 7 8-BIT TIMERS A0, B0
User’s Manual U15798EJ2V0UD
(4) 8-bit timer counters A0 and B0 (TMA0 and TMB0)
These are 8-bit registers that are used to count the count pulse.
TMA0 and TMB0 are read by an 8-bit memory manipulation instruction.
RESET input sets TMA0 and TMB0 to 00H.
TMA0 and TMB0 are cleared to 00H under the following conditions.
(a) Discrete mode
(i)
TMA0
•
After reset
•
When TCEA0 (bit 7 of 8-bit timer mode control register A0 (TMCA0)) is cleared to 0
•
When a match occurs between TMA0 and CRA0
•
When the TMA0 count value overflows
(ii) TMB0
•
After reset
•
When TCEB0 (bit 7 of 8-bit timer mode control register B0 (TMCB0)) is cleared to 0
•
When a match occurs between TMB0 and CRB0
•
When the TMB0 count value overflows
(b) Cascade connection mode (TMA0 and TMB0 are simultaneously cleared to 00H)
•
After reset
•
When the TCEB0 flag is cleared to 0
•
When matches occur simultaneously between TMA0 and CRA0 and between TMB0 and CRB0
•
When the TMA0 and TMB0 count values overflow simultaneously
(c) Carrier generator mode/PWM output mode (TMB0 only)
•
After reset
•
When the TCEB0 flag is cleared to 0
•
When a match occurs between TMB0 and CRB0
•
When a match occurs between TMB0 and CRHB0
•
When the TMB0 count value overflows
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