Motorola CMOS Logic, Руководство пользователя, Страница: 535 / 571

MOTOROLA CMOS LOGIC DATA
6–497
MC14582B
Figure 4. Switching Time Test Circuit and Waveforms
AC Paths DC Data
Input Output To VSS To VDD
P0 P Remaining G’s
P’s, Cn
G0 G P’s, Cn Remaining
G’s
Cn Cn+x, Cn+y, P’s G’s
Cn+z
TEST TABLE
Vout
Cin
CL
VDD
G0
G1
G2
G3
P0
P1
P2
P3
Cn+x
Cn+y
Cn+z
P
G
PULSE
GENERATOR
VSS
SEE
TEST
TABLE 20 ns
Vin
VDD
VSS
10%
90%
50%
20 ns
VOH
VOL
Vout
tPLH
tPHL
tTLH tTHL
TYPICAL APPLICATIONS
Cn Cn+4 Cn Cn+4 Cn Cn+4 Cn Cn+4
Cn Cn Cn Cn Cn+4
G P G P G P G P
G0 P0 Cn+x G1 P1 Cn+y G2 P2 Cn+z G3 P3
G P
Cn
MC14582B
MC14581B
MC14581B
16–BIT ALU, TWO LEVEL LOOK–AHEAD
16–BIT ALU, RIPPLE CARRY
Cn Cn Cn Cn Cn+4
G P G P G P G P
G0 P0 Cn+x G1 P1 Cn+y G2 P2 Cn+z G3 P3
G P
Cn
MC14582B
Cn Cn Cn Cn
Cn+4
G P G P G P G P
G0 P0 Cn+x G1 P1 Cn+y G2 P2 Cn+z G3 P3
G P
Cn
MC14582B
32–BIT ALU, TWO LEVEL LOOK–AHEAD OVER 16–BIT GROUPS
MC14581B
Cn Cn Cn Cn Cn+4
G P G P G P G P
G0 P0 Cn+x G1 P1 Cn+y G2 P2 Cn+z G3 P3
G P
Cn
MC14582B
Cn Cn Cn
G P G P
G0 P0 Cn+x G1 P1 Cn+y
Cn
MC14582B
COMBINED TWO–LEVEL LOOK–AHEAD AND RIPPLE CARRY ALU
MC14581B
Cn+4
Cn Cn Cn Cn
G P G P G P G P
G0 P0 Cn+x G1 P1 Cn+y G2 P2 Cn+z G3 P3
G P
Cn
MC14582B
Cn Cn Cn Cn Cn+4
G P G P G P G P
G0 P0 Cn+x G1 P1 Cn+y G2 P2 Cn+z G3 P3
G P
Cn
MC14582B
64–BIT ALU, FULL–CARRY LOOK–AHEAD IN THREE LEVELS.
MC14581B
Cn Cn+4 Cn+4
G0 P0 Cn+x
Cn MC14582B
G0 P0 Cn+x G1 P1 Cn+y
Cn
MC14582B
A AND B INPUTS AND F OUTPUTS ARE NOT SHOWN (MC14581B).
Cn
G P