134
FX
3U
/FX
3UC
Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
5 How to Specify Devices and Constants to Instructions
5.7 Indexing
5.7.2
Indexing in applied instructions
Expression of applied instructions allowing indexing
In the explanation of applied instructions, "
" is added to the source
or destination
symbol to
indicate operands allowing indexing as shown in the figure below so that such operands can be discriminated
from operands disallowing indexing.
In the case of bit devices
The indexing operation is explained in an example in which the
comparison result M0 in CMP (FNC 10) instruction is indexed with
the index register V1 (as shown in the figure on the right).
Transfer K0 or K10 to the index register V1 in advance.
When X001 is set to ON, "M(0+0) = M0" is realized and the
comparison result is output to M0 to M2 if V1 is "0".
On the other hand, "M(0+10) = M10" is realized and the comparison
result is output to M10 to M12 if V1 is "10".
• The index registers Z0 to Z7 and V0 to V7 can be used for
indexing.
In the case of word devices
1. indexing operands in 16-bit instructions
The indexing operation is explained in an example in which the
transfer destination D0 in MOV instruction is indexed with the index
register V3 (as shown in the figure on the right).
Transfer K0 or K10 to the index register V3 in advance.
When X001 is set to ON, "D(0+0) = D0" is realized if V3 is "0", and
K500 is transferred to D0.
When X001 is set to ON, "D(0+10) = D10" is realized if V3 is "0", and
K500 is transferred to D10.
2. indexing operands in 32-bit instructions
In a 32-bit instruction, it is necessary to specify also a 32-bit index
register in the instruction.
When an index register Z (Z0 to Z7) is specified in a 32-bit
instruction, the specified Z and its counterpart V (V0 to V7) work
together as a 32-bit register.
The indexing operation is explained in an example in which the
transfer destinations [D1, D0] in DMOV instruction are indexed with
the index registers [V4, Z4] (as shown in the figure on the right).
Transfer K0 or K10 to the index registers [V4, Z4] in advance.
When X003 is set to ON, "[D(1+0), D(0+0)] = [D1, D0]" is realized if
[V4, Z4] is "0", and K69000 is transferred to [D1, D0].
When X003 is set to ON, "[D(1+10), D(0+10)] = [D11, D10]" is
realized if [V4, Z4] is "10", and K69000 is transferred to [D11, D10].
S
D
FNC 12
MOV
K100
D 10
S
D
Indicates that indexing is allowed.
X000
K0
V1
K0
→
V1
X000
K10
V1
K10
→
V1
X001
V1=0
V1=10
D0>D1
→
M0=ON M10=ON
D0=D1
→
M1=ON M11=ON
D0<D1
→
M2=ON M12=ON
FNC 12
MOVP
FNC 12
MOVP
D0
D1
FNC 10
CMP
M0V1
X000
K0
V3
K0
→
V3
X000
K10
V3
K10
→
V3
X001
K500
D0V3
V3=0 : K500
→
D0 (D0+0)
V3=10 : K500
→
D10 (D0+10)
FNC 12
MOVP
FNC 12
MOVP
FNC 12
MOV
X002
K0
Z4
K0
→
V4,Z4
X002
K10
Z4
K10
→
V4,Z4
X003
K69000
D0Z4
V4,Z4=0 : K69000
→
D1 ,D0 (D0+0)
V4,Z4=10 : K69000
→
D11,D10 (D0+10)
FNC 12
DMOVP
FNC 12
DMOVP
FNC 12
DMOVP
Содержание FX3U Series
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