Intel 855PM, Руководство по конструкции

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Platform Clock Routing Guidelines
R
Intel
®
855PM Chipset Platform Design Guide
239
Figure 134. CLK33 Group Topology
A
R1
Clock
Driver
ICH4-M,
SIO,
FWH
B
Table 66. CLK33 Group Routing Guidelines
Parameter Routing Guidelines Figure Notes
Signal Group CLK33 1
Motherboard Topology Point-to-Point
Reference Plane
Ground Referenced (Contiguous over entire
length)
Characteristic Trace Impedance (Zo) 55 ± 15%
Trace Width 4 mils
Trace to Space Ratio 1:5 (e.g. 4 mils trace 20 mils space)
Group Spacing
Isolation spacing from non-Clock signals =
20 mils minimum
Trace Length – A
Must be exactly trace length matched to
CLK66 Trace A
Figure 134
Trace Length – B
Must be exactly trace length matched to
CLK66 Trace B
Figure 134
Series Termination Resistor (R1) 33 ± 5% Figure 134
Skew Requirements
Minimal skew (~ 0) between CLK33 group
and CLK66 group
NOTES:
1.
Recommended resistor values and trace lengths may change in a later revision of the design guide.
10.2.5. PCICLK Clock Group
The driver is the clock synthesizer 33-MHz clock output buffer and the receiver is the 33-MHz clock
input buffer at the PCI devices on the PCI cards. Note that the goal is to have a maximum of ±1 ns skew
between the clocks within this group, and also a maximum of ± 1 ns skew between the clocks of this
group and that of group CLK33.