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System Memory Design Guidelines (DDR-SDRAM)
R
146
Intel
®
855PM Chipset Platform Design Guide
6.1.3.2.2.
Command Topology 2 to Clock Length Matching Requirements
The command signals must be 0.5 inches shorter to 1.0 inches longer than their associated differential
clock pairs.
Length matching equation for SO-DIMM0:
X
1
= SCK/SCK#[2:0]
Y
1
= Command Signals = L1 + Rs L2 of Figure 82 where:
( Y
1
– 1.0” )
X
1
( Y
1
+ 0.5” )
Length matching equation for SO-DIMM1:
X
2
= SCK/SCK#[5:3]
Y
2
= Command Signals = L1 + L3 of Figure 82 where:
( Y
2
– 1.0” )
X
2
( Y
2
+ 0.5” )
For example if the clock length of SCK/SCK#[2:0](X
1
) is 5.0 inches then the length of all command
signal routing to SO-DIMM0 must be between 4.5 inches to 6.0 inches, if SCK/SCK#[5:3](X
2
) is 5.5
inches then the length of command signal routing to SO-DIMM1 must be between 5.0 inches to 6.5
inches. Figure 83 depicts the length matching requirements between the command and clock signals.
The MCH package lengths do not need to be taken into account for routing length matching purposes.
Содержание 855PM
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Страница 22: ...Introduction R 22 Intel 855PM Chipset Platform Design Guide This page intentionally left blank...
Страница 32: ...General Design Considerations R 32 Intel 855PM Chipset Platform Design Guide This page intentionally left blank...
Страница 124: ...Platform Power Requirements R 124 Intel 855PM Chipset Platform Design Guide This page intentionally left blank...
Страница 182: ...Hub Interface R 182 Intel 855PM Chipset Platform Design Guide This page intentionally left blank...
Страница 228: ...I O Subsystem R 228 Intel 855PM Chipset Platform Design Guide This page intentionally left blank...
Страница 328: ...Platform Design Checklist R 328 Intel 855PM Chipset Platform Design Guide This page intentionally left blank...