Interrupt Controller (8259A)
A brief review of the registers’ general descriptions follows.
•
IRR (Interrupt Request Register):
Specifies all interrupts
requesting service.
•
ISR (In-Service Register): Specifies all interrupt levels being
serviced.
•
IMR (Interrupt Mask Register): Specifies all interrupt levels that
are masked.
To read the contents of the IRR or ISR, you must first issue the
appropriate read register command (read IRR or read ISR) to the
8259A. Then, by applying an RD* pulse to the 8259A (an input
instruction), the contents of the desired register can be acquired. You
need not issue a read register command every time the IRR or ISR is
to be read. Once the 8259A receives a read register command, it
"remembers" which register has been selected. Thus, all that is
necessary to read the contents of the same register more than once is
the RD* pulse and the correct addressing (A0=0). Upon initialization,
the selection of registers defaults to the IRR.
Some caution should be taken when using the read register command
in a system that supports several levels of interrupts. If the higher
priority routine causes an interrupt between the read register
command and the actual input of the register contents, there is no
guarantee the same register will be selected when it returns. Thus, it is
best in such cases to disable interrupts during the operation.
Reading the contents of the IMR is different from reading the IRR or
ISR. A read register command is not necessary when reading the IMR
because the IMR can be addressed directly for both reading and
writing. Thus all that the 8259A requires for reading the IMR is an
RD* pulse and the correct addressing (A0 = 1).
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