CPU Description
Prefetch Pointer (PFP)
This is a 16-bit binary counter. It contains the segment offset used to
calculate a program memory address. The Bus Control Unit (BCU)
uses this address to prefetch the next byte for the instruction queue.
The contents of the PFP are an offset from the Program Segment
(PS)[CS] register.
The PFP is incremented each time the BCU prefetches an instruction
from the program memory. A new location is loaded into the PFP
each time one of the following instruction types executes: branch,
call, return, or break. At this time, the contents of the PFP are the
same as the PC. The PFP is not directly accessible to the programmer.
General Purpose Registers
There are four 16-bit general purpose registers, each of which can be
used as 8-bit registers by referencing their high or low byte names.
All of the registers are intended for use as temporary data storage, and
their typical uses are listed here:
AW [AX] -
Word multiplication or division, word I/O, data
conversion
AL [AL] -
Byte multiplication or division, byte I/O, Binary
Coded
Decimal
rotation,
data
conversion
or
translation (low byte of AW)
AH [AH] -
Byte multiplication or division (high byte of AW)
BW [BX] -
Data translation (byte references are BL and BH)
CW [CX] -
Loop control branch, repeat prefix (byte references
are CL and CH)
CL [CL] -
Shift, rotate, or BCD operations
DW [DX] -
Word multiplication or division, indirect I/O address-
ing instructions (byte references are DL and DH)
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