CPU Description
16/32-Bit Temporary Shift Registers (TA,TB)
Two 16-bit shift registers have been added for use by multiplication
and division instructions, and for shift and rotate functions for
temporary storage. These registers have decreased the execution time
of multiplication and division instructions by a factor of four over the
microprogramming method. If TA and TB are cascaded, they may be
used as a 32-bit register useful for multiplication and division. These
registers are not accessible to the programmer.
Loop Counter (LC)
The loop counter is designed for use by two instruction types that
must count a number of times before completing. These instructions
are primitive block transfers controlled by a repeat prefix instruction,
and multiple bit shift or rotate. Use of the loop counter improves
processor performance; for example, a multiple bit rotation of a
register is two times faster.
Program Counter (PC) and Prefetch Pointer (PFP)
The V20 uses both a program counter and a prefetch pointer for
program instruction addressing. The program counter addresses the
program memory location of the next instruction to be executed, and
the prefetch pointer addresses the program memory location to be
read into the instruction queue. Both of these are hardware functions,
saving several clocks in the execution of branch, call, return, and
break instructions over microprocessors with only one instruction
pointer.
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