Real-Time Clock (DS 1215)
The memory management portion provides the necessary support
circuitry to prevent an invalid chip access to a RAM when power is
failing. The timekeeper shares memory address space with a battery-
backed RAM, known as the RAM drive in STD DOS systems.
Wherever this RAM is located in system address space, according to
jumpers W57-59, the real-time clock may be addressed there as well.
Factory default is D8000h. The timekeeper remains in the back-
ground, allowing free access to the RAM as long as Vcc remains
above 4.5 V. It watches the data going to the RAM, on data bit zero,
for its signature. Once selected by its 64-bit signature, the timekeeper
may be accessed at the RAM’s base address.
Buffer
CSOUT
Battery
1 A-Hr
(Optional)
CMOS
RAM
32Kx8
RAM DRIVE
Real-Time
Clock
DIN
DOUT
CSIN
Bat
CPU
CS
32768 Hz
Figure 10–1. Real-Time Clock Block Diagram.
10-2