Serial Communications (16C452)
Data-Terminal-Ready (DTR0*, DTR1*)
Each DTR* pin can be set active (low) by writing a logical 1 to the
DTR bit in the Modem Control register (MCR), bit 0, of its associated
UART. This signal is cleared (high) by writing a logical 0 to the DTR
bit in the MCR or whenever a reset occurs. When active, the DTR*
pin indicates that its UART is ready to receive data.
Serial Channel Interrupt Outputs (INT0, INT1)
Each serial channel interrupt goes active (high) when one of the
following interrupt sources has an active condition and is enabled by
the Interrupt Enable register (IER) of its associated channel: Receiver
Error flag, Received Data Available, Transmitter Holding Register
Empty (THRE), and Modem Status. The interrupt is reset low upon
appropriate service or a reset operation.
Factory default assigns INT0 to Interrupt Request level 4 (IR4) and
INT1 to Interrupt Request level 3 (IR3) at the 8259A Programmable
Interrupt Controller on board. These correspond to COM1 and COM2
in an STD DOS system, respectively, identical to the interrupt levels
in an IBM PC or equivalent.
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