Serial Communications (16C452)
Information stored in the IIR indicates that a prioritized interrupt is
pending. The source of the interrupt is also indicated. The IIR, when
addressed during chip-select time,
freezes the highest priority
interrupt pending, and no other interrupts are acknowledged until the
particular interrupt is serviced by the CPU. The contents of the IIR
are indicated in Table 8-3 on pages 8-18 and 8-19 and are described
below.
Bit 0
This bit can be used in either a hardwired prioritized
or a polled environment to indicate whether an
interrupt is pending. When bit 0 is a logical 0, an
interrupt is pending and the IIR contents may be used
as a pointer to the appropriate interrupt service
routine. When bit 0 is a logical 1, no interrupt is
pending and polling (if used) continues.
Bits 1 and 2
These two bits of the IIR are used to identify the
highest priority interrupt pending, as indicated in
Table 8-5, "16C452 Interrupt Control Functions."
Bits 3 - 7
These five bits of the IIR are always logical 0.
8-29