Introduction
Interrupts
The programmable interrupt controller (PIC) on the ZT 8809A is an
Intel 8259A-2 or equivalent. It has eight interrupt inputs that can be
prioritized in software. Its output drives the CPU interrupt input. All
PIC interrupt inputs may be jumper selected between various on-
board sources and the five frontplane and three backplane sources.
Factory default assigns the STD DOS compatible interrupt selections
as described by jumper descriptions W2-11 in Appendix A.
The interrupt structure follows Revision 2.3 and later of the STD-80
Series Bus Specification, which allows for the RESERVED and
CNTRL* STD bus pins 37 and 50, respectively, to be interrupt
sources as well as INTRQ* pin 44. These signals are now referred to
as INTRQ1*, INTRQ2*, and INTRQ*, respectively. This provides
for more backplane interrupts and may eliminate frontplane cabling
for added interrupts.
Also supported is the 8088 STD bus protocol for PIC cascading,
allowing for 8259A interrupt controller expansion. The PIC may
handle up to 50 prioritized interrupts by combining six off-board
sources, each of which may support eight interrupt inputs via a
separate "slave" interrupt controller, plus two direct on-board sources.
1-11
