General Lists
Name
Description
Logics.LE58.Reset Latch-I
State of the module input: Reset Signal for the Latching
Logics.LE59.Gate Out
Signal: Output of the logic gate
Logics.LE59.Timer Out
Signal: Timer Output
Logics.LE59.Out
Signal: Latched Output (Q)
Logics.LE59.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE59.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE59.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE59.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE59.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE59.Reset Latch-I
State of the module input: Reset Signal for the Latching
Logics.LE60.Gate Out
Signal: Output of the logic gate
Logics.LE60.Timer Out
Signal: Timer Output
Logics.LE60.Out
Signal: Latched Output (Q)
Logics.LE60.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE60.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE60.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE60.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE60.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE60.Reset Latch-I
State of the module input: Reset Signal for the Latching
Logics.LE61.Gate Out
Signal: Output of the logic gate
Logics.LE61.Timer Out
Signal: Timer Output
Logics.LE61.Out
Signal: Latched Output (Q)
Logics.LE61.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE61.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE61.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE61.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE61.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE61.Reset Latch-I
State of the module input: Reset Signal for the Latching
Logics.LE62.Gate Out
Signal: Output of the logic gate
Logics.LE62.Timer Out
Signal: Timer Output
Logics.LE62.Out
Signal: Latched Output (Q)
Logics.LE62.Out inverted
Signal: Negated Latched Output (Q NOT)
Logics.LE62.Gate In1-I
State of the module input: Assignment of the Input Signal
Logics.LE62.Gate In2-I
State of the module input: Assignment of the Input Signal
Logics.LE62.Gate In3-I
State of the module input: Assignment of the Input Signal
Logics.LE62.Gate In4-I
State of the module input: Assignment of the Input Signal
Logics.LE62.Reset Latch-I
State of the module input: Reset Signal for the Latching
Logics.LE63.Gate Out
Signal: Output of the logic gate
Logics.LE63.Timer Out
Signal: Timer Output
Logics.LE63.Out
Signal: Latched Output (Q)
626
MRU4
DOK-HB-MRU4-2E