VooDoo DCR 6000, Planning & Installation Manual

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1. General DCR 6024/6128/6000
1 – 18 Planning and Installation – Rev. 1 / 7. 2001
AINP Audio Input
The recording signals are fed to the board AINP. The segment memory stores the
recording signals temporarily to establish the segmented recording signal format,
which corresponds to the audio data block for error correction coding. Readout sig-
nal from the segment memory is supplied to the Read-Solomon encoder which cal-
culates outer parities for the audio data. The encoded output signal is stored in the
shuffling memory. This memory generates the first and the second recording data
with different shuffling schemes in a unit of inner code word.
The first and second recording data are transmitted to the board CODC to be multi-
plexed into video data.
CODC Encoder / Decoder
The serial data are fed to the decoder board CODC via the board I/O1 from the Ta-
pedeck. In this board, the serial data are converted into parallel form, and fed to
the TBC (Time Base Corrector) to reject time base errors. The sync pattern are de-
tected from the reproduced data in the sync detector circuit. The channel decoder
converts the 12-bit modulated data into 8-bit data. The inner decoder performs
detection and correction of errors. The audio data are separated after inner error
correction.
VDFM Video Playback Processor
In the board VDFM, the field deshuffling is done in a field basis, then the outer error
correction is carried out.
VOUT Video Out Processor
The corrected data are fed to the board VOUT. In the board VOUT, the data is re-
arranged into the original data arrangement after the line deshuffling and channel
deshuffling.The concealment circuit is provided to interpolate the data in case that
the data are not fully corrected by using the outer parity. By using the surrounding
non-erroneous pixels the erroneous data are interpolated. The video sync data are
added to the blanking interval then the data are converted from parallel form to se-
rial form, and fed to the board SCCV. If the digital I/O option (available only for 60i
and 59.94i) is installed the digital signal is fed to the output connector.
SCCV Scanning Converter
The digital parallel signal coming from the VOUT board is converted from a seg-
mented format to the selected output format. Lines containing 2bit Y are stored
in a memory and added to the Y signal. A parallel to serial converter generates the
output signal according to SMPTE 292M standard.
A video monitoring circuit generates an analog output signal (Y, P
R
, P
B
, Sync) or
R, G, B, Sync according to the selected standard.
AOUT Audio Out Processing
The board CODC supplies reproduced audio data to the board AOUT.In the board
AOUT, the reproduced data and inner decoder flags are stored in the deshuffling
memory. Storing operation is permitted when the reproduced data are likely to have
correct inner code block addresses. When the storing is inhibited, a new/old flag
is set to ”1” for corresponding inner code block in order to avoid misdetection by
older correct inner code block.The first and the second recording data are readout
from the deshuffling memory by turns in a unit of symbol. Then, for each data sym-
bol, optimum one is selected to achieve optimum outer code word. This code word
Audio Record
Video Play
Audio Play