User Manual
EM100 Mini Inve
Fault Retry Tim
F07.12 Ones Pla
Fault occurs in th
manual reset.
F07.12 Ones Pla
Fault occurs in th
resets fault autom
run without fault
F07.12 ones place
automatic fault re
F07.12 Ones Pla
Fault occurs in th
resets fault autom
External Output
F07.12 Tens plac
During the period
F07.12 Tens plac
During the period
Fault Retry Tim
F07.13
controls th
fault output to res
Parameter value i
Timelag without
F07.14
controls th
process, after rese
in the setting time
Timelag without
1. In the
into con
cannot s
inverter does no
2. In auto-reset
status.
No.
Func
F07.15
Fault
Optio
Fault retry is bit o
erter
90
mes
ace=0
he process of operation, invert
ace=1/2/3
he process of operation, invert
matically and restarts operation
is over (F07.14), and the faul
e. If fault retry is over 1/2/3 ti
eset.
ace=4
he process of operation, invert
matically and restarts operation
t at Fault Retry
ce=0
d of fault retry, fault output ter
ce=1
d of fault retry, fault output ter
melag
he timelag of fault retry. Faul
setting fault automatically.
is in the range of 0.01
～
30.00
t Fault
he time for inverter resetting f
et and restarted, inverter will r
e of this code, the inverter wil
fault: 0.01
～
30.00 seconds an
e process of operation, start fe
nsideration. Fault reset canno
start with load or the applic
ot output.
t timelag, inverter blocks PW
ction
Range
t Retry
ons
OL
ILP
SLU
1 1 1
0: Fault retry perm
1: Fault retry proh
SOC is LSB, arra
the 6
th
~the 8
th
bit
operation. Set the correspondi
0
ter will not reset automatically
ter stops output. After fault cle
n 1/2/3 times. The time that in
t retry times resets to the setti
imes, fault still occurs, and the
ter stops output. After fault cle
n until operating normally.
rminal and fault relay are disa
rminal and fault relay are enab
lt retry timelag refers to the pe
0S and can be set in succession
fault retry times. Fault occurs
record the fault reset times. If
ll clear the fault reset times au
nd can be set in succession.
eatures of mechanic devices sh
ot be conducted if the appli
cations require alarming imm
WM output, and motor is in
Unit
U
SOU
SOC
1 1
mitted
hibited
ange in logical order,
ts are not used
ing bit of fault as 0 or 1.
y, and it requires
eared, inverter
nverter takes to
ing value of
en there is no
eared, inverter
abled.
bled.
eriod from no
n.
s in operation
f no fault occurs
utomatically.
hould be taken
ications which
mediately after
n coast-to-stop
Default Type
11111
〇
