12-10
Standard Event Reports and SER
Date Code 20011205
SEL-311A Instruction Manual
Column
Heading
Corresponding
Elements (Relay
Word Bits)
Symbol
Definition
VPOL VPOLV
V
VPOLV
asserted
51 P
51P, 51PT, 51PR
p
Time-overcurrent element picked up
and timing
51 G
51G, 51GT, 51GR
T
Time-overcurrent element timed out
r
Time-overcurrent element timing to
reset
1
Time-overcurrent element timing to
reset after having timed out (when
element reset is set for 1 cycle, not
electromechanical reset)
50P 50P1,
50P2
1
2
b
50P1 asserted
50P2 asserted
both 50P1 and 50P2 asserted
50G 50G1,
50G2
1
2
b
50G1 asserted
50G2 asserted
both 50G1 and 50G2 asserted
32 Q
F32Q Q
Forward
negative-sequence
directional element F32Q picked up.
32 QVI
F32QG
Q
Forward negative-sequence ground
directional element F32Q picked up.
F32V
V
Forward zero-sequence ground
directional element F32V picked up.
F32I
I
Forward current polarized ground
directional element F32I picked up.
67P 67P1
1
67P1
asserted
67G
67G1
1
67G1 asserted
DM P Q
PDEM, QDEM
P
Phase demand ammeter element
PDEM picked up.
Q
Negative-sequence demand ammeter
element QDEM picked up.
b
Both PDEM and QDEM picked up.
DM G
GDEM
*
Residual ground demand ammeter
element GDEM picked up.
Zld
ZLIN, ZLOUT
i
Load encroachment “load in” element
ZLIN picked up.
o
Load encroachment “load out”
element ZLOUT picked up.
LOP
LOP
*
Loss-of-potential element LOP picked
up.
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