Omron SYSMAC CJ1W-EIP21, Operation Manuals

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A-37
Appendices
CJ-series EtherNet/IP Units Operation Manual for NJ-series CPU Unit (W495)
A
-6 Diff
erences
in A
v
a
ilab
le Fu
nction
s Dep
endi
ng o
n
the CPU
Unit (NJ
or CJ Series)
App
A-6-2 Diff
eren
ces in Access Me
th
ods from the User Prog
ram

CIO n+20 to n+23: Normal Target Node Table
The device variable that corresponds to all of the bits in CIO n+20 to n+23 is given in the following
table.
The device variables that correspond to bits 00 to 15 in CIO n+20 to n+23 are given in the following
table.
I/O memory location in CJ-
series CPU Unit
Device variable for the CJ-series Unit in NJ-series CPU Unit
Word address Bit numbers Variable name Description
CIO n+20 to
n+23 00 to 15 in
each word *_EstbRegTargetSta Normal Target Node Table
(The functions of bits 00 to 15 in these words and
the functions of the device variable given on the left
correspond as given below.)
• Bits 00 to 15 of CIO n+20 correspond to bits 00
to 15 of the device variable given on the left.
• Bits 00 to 15 of CIO n+21 correspond to bits 16
to 31 of the device variable given on the left.
• Bits 00 to 15 of CIO n+22 correspond to bits 32
to 47 of the device variable given on the left.
• Bits 00 to 15 of CIO n+23 correspond to bits 48
to 63 of the device variable given on the left.
I/O memory location in CJ-
series CPU Unit
Device variable for the CJ-series Unit in NJ-series CPU Unit
Word address Bit numbers Variable name Description
CIO n+20 0 *_EstbRegTargetSta[0] Normal Target Node Table Bit for Node Address 0
1 *_EstbRegTargetSta[1] Normal Target Node Table Bit for Node Address 1
2 *_EstbRegTargetSta[2] Normal Target Node Table Bit for Node Address 2
3 *_EstbRegTargetSta[3] Normal Target Node Table Bit for Node Address 3
4 *_EstbRegTargetSta[4] Normal Target Node Table Bit for Node Address 4
5 *_EstbRegTargetSta[5] Normal Target Node Table Bit for Node Address 5
6 *_EstbRegTargetSta[6] Normal Target Node Table Bit for Node Address 6
7 *_EstbRegTargetSta[7] Normal Target Node Table Bit for Node Address 7
8 *_EstbRegTargetSta[8] Normal Target Node Table Bit for Node Address 8
9 *_EstbRegTargetSta[9] Normal Target Node Table Bit for Node Address 9
10 *_EstbRegTargetSta[10] Normal Target Node Table Bit for Node Address
10
11 *_EstbRegTargetSta[11] Normal Target Node Table Bit for Node Address
11
12 *_EstbRegTargetSta[12] Normal Target Node Table Bit for Node Address
12
13 *_EstbRegTargetSta[13] Normal Target Node Table Bit for Node Address
13
14 *_EstbRegTargetSta[14] Normal Target Node Table Bit for Node Address
14
15 *_EstbRegTargetSta[15] Normal Target Node Table Bit for Node Address
15