NXP Semiconductors MC9S12VRP64, Owner Reference Manual

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Device Overview S12VRP-Series
MC9S12VRP Family Reference Manual Rev. 1.3
NXP Semiconductors 31
1.8.2.9 PL[5:0] / KWL[5:0] — Port L Input Signals
PL[5:0] are high voltage input ports. The signals can be configured on per signal basis as interrupt inputs
with wake-up capability (KWL[5:0]).
1.8.2.10 LIN — LIN Physical Layer Signal
This pad is connected to the single-wire LIN data bus.
1.8.2.11 HS[1:0] — High-Side Drivers Output Signals
Outputs of the two high-side drivers intended to drive incandescent bulbs or LEDs.
1.8.2.12 LS[1:0] — Low-Side Drivers Output Signals
Outputs of the two low-side drivers intended to drive inductive loads (relays).
1.8.2.13 LS2 — Low-Side Driver Output Signal
Output of the general purpose (20mA) low-side driver.
1.8.2.14 VSENSE — Voltage Sensor Input
This pin can be connected to the supply (Battery) line for voltage measurements. The voltage present at
this input is scaled down by an internal voltage divider, and can be routed to the internal ADC via an analog
multiplexer. The pin itself is protected against reverse battery connections. To protect the pin from external
fast transients an external resistor is needed.
1.8.2.15 AN[11:0] — ADC Input Signals
AN[11:0] are the analog inputs of the Analog-to-Digital Converter. The channels AN[5:0] are connected
to PAD[5:0] port pins. The channels AN[11:6] are connected to HVI[5:0] respectively.
1.8.2.16 VRH, VRL — ADC Reference Signals
VRH and VRL are the reference voltage inputs for the analog-to-digital converter. VRH is internally
connected to VDDA. VRL is internally connected to VSSA.
1.8.2.17 LINPHY Signals
1.8.2.17.1 VLINSUP — Positive Power Supply
This is the power supply to the LINPHY. VLINSUP is connected internally to VSUP.
1.8.2.17.2 LPTXD Signal
This signal is the LINPHY transmit input.