NXP Semiconductors MC9S12VRP64, Owner Reference Manual

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Device Overview S12VRP-Series
MC9S12VRP Family Reference Manual Rev. 1.3
NXP Semiconductors 21
— User margin level setting for reads
1.5.3 On-Chip SRAM
• 6 KB of general-purpose RAM
1.5.4 Main External Oscillator (XOSCLCP)
• Loop control Pierce oscillator using 4 MHz to 20 MHz crystal
— Current gain control on amplitude output
— Signal with low harmonic distortion
— Low power
— Good noise immunity
— Eliminates need for external current limiting resistor
— Transconductance sized for optimum start-up margin for typical crystals
— Oscillator pins shared with GPIO functionality
1.5.5 Internal RC Oscillator (IRC)
• Factory trimmed internal reference clock
— 1 MHz internal RC oscillator with

1.3% accuracy over rated temperature range
1.5.6 Internal Phase-Locked Loop (IPLL)
• Phase-locked-loop clock frequency multiplier
— No external components required
— Reference divider and multiplier allow large variety of clock rates
— Automatic bandwidth control mode for low-jitter operation
— Automatic frequency lock detector
— Configurable option to spread spectrum for reduced EMC radiation (frequency modulation)
— Reference clock sources:
– Internal 1 MHz RC oscillator (IRC)
– External crystal oscillator
1.5.7 Clock and Power Management Unit (CPMU)
• Real time interrupt (RTI)
• Clock monitor (CM)
• System reset generation