9.3.2 Register Descriptions
Table 9-3 summarizes the registers of port 2.
Table 9-3 Port 2 Registers
Initial Value
Address
*
Name
Abbreviation
R/W
Modes 1 to 4
Modes 5 to 7
H'FFC1
Port 2 data direction register
P2DDR
W
H'FF
H'00
H'FFC3
Port 2 data register
P2DR
R/W
H'00
H'00
H'FFD8
Port 2 input pull-up MOS
P2PCR
R/W
H'00
H'00
control register
Note:
*
Lower 16 bits of the address.
Port 2 Data Direction Register (P2DDR): P2DDR is an 8-bit write-only register that can select
input or output for each pin in port 2.
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P2DDR values are fixed at 1
and cannot be modified. Port 2 functions as an address bus.
Modes 5 and 6 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 2 is
an input port. A pin in port 2 becomes an address output pin if the corresponding P2DDR bit is set
to 1, and a generic input port if this bit is cleared to 0.
Mode 7 (Single-Chip Mode): Port 2 functions as an input/output port. A pin in port 2 becomes an
output port if the corresponding P2DDR bit is set to 1, and an input port if this bit is cleared to 0.
Bit
Modes
1 to 4
Initial value
Read/Write
Initial value
Read/Write
Modes
5 to 7
7
P2 DDR
1
—
0
W
7
6
P2 DDR
1
—
0
W
6
5
P2 DDR
1
—
0
W
5
4
P2 DDR
1
—
0
W
4
3
P2 DDR
1
—
0
W
3
2
P2 DDR
1
—
0
W
2
1
P2 DDR
1
—
0
W
1
0
P2 DDR
1
—
0
W
0
Port 2 data direction 7 to 0
These bits select input or
output for port 2 pins
250
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