Figure 18-4 High-Speed Programming Flowchart
Start
Set programming/verification mode
V = 6.0 V ± 0.25 V, V = 12.5 V ± 0.3 V
CC
PP
Address = 0
→
PW
Verification OK?
Program with t = 0.2n ms
OPW
Last address?
Set read mode
V = 5.0 V ± 0.25 V, V = V
CC
PP
CC
All addresses
read?
End
Fail
n 25
<
A 1 address
→
No
Yes
No
Yes
No
No
Program with t = 0.2 ms ± 5%
n = 0
n + 1 n
Yes
Yes
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