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GD32L23x User Manual
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source to IRC16M and the PLL will be disabled automatically
LXTAL Clock Monitor (LCKM)
A clock monitor on LXTAL can be activated by software writing the LXTALCKMEN bit in the
control register (RCU_CTL).
LXTALCKMEN can not be enabled before LXTAL and IRC32K
are enabled and ready.
The clock monitor on LXTAL is working in all modes except VBAT. If a failure is detected on
the external 32 kHz oscillator, an interrupt can be sent to CPU.
The software must then disable the LXTALCKMEN bit, stop the defective 32 kHz oscillator,
and change the RTC clock source, or take any required action to secure the application.
A 4-bits plus one counter will work at IRC32K domain when LXTALCKMEN enable. If the
LXTAL clock has stuck at 0/1 error or slow down about 20KHz, the counter will overflow. The
LXTAL clock failure will been found.
Clock Output Capability
The clock output capability is ranging from 32 kHz to 64 MHz. There are several clock signals
can be selected via the CK_OUT clock source selection bits, CKOUTSEL, in the configuration
register 0 (RCU_CFG0). The corresponding GPIO pin should be configured in the properly
alternate function I/O (AFIO) mode to output the selected clock signal.
Table 4-1. Clock source select
Clock Source Selection bits
Clock Source
000
No Clock
001
CK_IRC48M
010
CK_IRC32K
011
CK_LXTAL
100
CK_SYS
101
CK_IRC16M
110
CK_HXTAL
111
CK_PLL or CK_PLL/2
The CK_OUT frequency can be reduced by a configurable binary divider, controlled by the
CKOUTDIV[2:0] bits, in the configuration register 0(RCU_CFG0).
Deep-sleep 1/2 mode clock control
When the MCU is in deep-sleep 1/2 mode, the LPUART / USART0 / USART1 can wake up
the MCU, when their clock is provided by LXTAL clock and LXTAL clock is enable.
If the LPUART / USART0 / USART1 clock is selected IRC16M_DIV clock in deep-sleep 1/2
mode, they have capable of open IRC16M clock or close IRC16M clock, which used to the
LPUART / USART0 / USART1 / I2C0 / I2C1 / I2C2 to wake up the Deep-sleep mode.
If the LPUART / USART0 / USART1 clock is selected LXTAL clock in deep-sleep 1/2 mode,
they have capable of open LXTAL clock or close LXTAL clock (if LXTAL is opened by softer,