GD32L23x User Manual
262
frequency, the calendar reading flow should be obeyed:
1.
reading calendar time register and date register twice
2.
if the two values are equal, the value can be seen as the correct value
3.
if the two values are not equal, a third reading should performed
4.
the third value can be seen as the correct value
RSYNF is asserted once every 2 RTC clock and at this time point, the shadow registers will
be updated to current time and date.
To ensure consistency of the 3 values (RTC_SS, RTC_TIME, and RTC_DATE), below
consistency mechanism is used in hardware:
1.
reading RTC_SS will lock the updating of RTC_TIME and RTC_DATE
2.
reading RTC_TIME will lock the updating of RTC_DATE
3.
reading RTC_DATE will unlock updating of RTC_TIME and RTC_DATE
If the software wants to read calendar in a short time interval(smaller than 2 RTCCLK periods),
RSYNF must be cleared by software after the first calendar read, and then the software must
wait until RSYNF is set again before next reading.
In below situations, software should wait RSYNF bit asserted before reading calendar
registers (RTC_SS, RTC_TIME, and RTC_DATE):
1.
after a system reset
2.
after an initialization
3.
after shift function
Especially that software must clear RSYNF bit and wait it asserted before reading calendar
register after wakeup from power saving mode.
Reading calendar registers under BPSHAD=1
When BPSHAD=1, RSYNF is cleared and maintains as 0 by hardware so reading calendar
registers does not care about RSYNF bit. Current calendar value is read from real-time
calendar counter directly. The benefit of this configuration is that software can get the real
current time without any delay after wakeup from power saving mode (Deep-sleep /Standby
Mode).
Because of no RSYNF bit periodic assertion, the results of the different calendar registers
(RTC_SS/RTC_TIME/RTC_DATE) might not be coherent with each other when clock
ck_apre edge occurs between two reading calendar registers.
In addition, if current calendar register is changing and at the same time the APB bus reading
calendar register is also performing, the value of the calendar register read out might be not
correct.
To ensure the correctness and consistency of the calendar value, software must perform
reading operation as this: read all calendar registers continuously, if the last two values are
