Fujitsu MB91150 Series, Hardware Manual, Page: 424 / 512

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CHAPTER 20 CALENDAR MACROS
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Second data register (CA1)
The second data register (CA1) has the following bit configuration:
[bit 7, 6] Reserved
These bits are reserved. Writing these bits is ignored.
[bit 5 to 0] S5 to 0
These bits indicate second data. They indicate a binary value from 0 to 59.
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Minute data register (CA2)
The minute data register (CA2) has the following bit configuration:
[bit 7, 6] Reserved
These bits are reserved. Writing these bits is ignored.
[bit 5 to 0] M5 to 0
These bits indicate minute data. They indicate a binary value from 0 to 59.
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Hour data register (CA3)
The hour data register (CA3) has the following bit configuration:
[bit 7 to 5]Reserved
These bits are reserved. Writing these bits is ignored.
[bit 4 to 0] H4 to 0
These bits indicate hour data. They indicate a binary value from 0 to 23.
7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit
CA1 - - S5 S4 S3 S2 S1 S0
Initial value
--XXXXXX
B
[R/W]
7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit
CA2 - - M5 M4 M3 M2 M1 M0
Initial value
--XXXXXX
B
[R/W]
7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit
CA3 - - - H4 H3 H2 H1 H0
Initial value
---XXXXX
B
[R/W]