5 Function blocks
5.30 SR, shift register
250
Control Relay easy800
11/11 MN04902001Z-EN
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A rising edge at the BP (BackwardPulse) transfers the bit value at the BD
(BackwardData) data input to the last register field Q8. The original contents
of the register fields are then moved by one field in the direction of the next
lower field number.
Example: Shift register BIT mode, forward
Figure 182:Shift register SR..: Forwards operation in BIT operating mode
a
Initial situation
– SR..EN is not activated, the function block is not active.
– SR..Q7 contains a data bit 1, a 0 is contained in the other register fields.
b
Transfer of a data bit:
– SR..EN is activated, the function block is active.
– SR..FD has the value 1.
– With the forwards pulse from SR..FP the register field SR..Q1 shifts the content of all register fields
one place forwards and accepts the 1 from SR..FD.
c
Transfer of a data bit:
– SR..EN is activated, the function block is active.
– SR..FD has the value 0.
– with the forwards pulse from SR..FP the register field SR..Q1 shifts the content of all register fields
one place forwards and accepts the 0 from SR..FD.
d
Reset of the register:
– SR..EN is activated, the function block is active.
– Activating SR..RE clears the content of the register.
You have set DW mode
A rising edge at FP (ForwardPulse) causes the double word value at data
input I1 to be transferred to the first register field D1. The original contents of
the register fields are then moved by one field in the direction of the next
higher field numbers.
A rising edge at the BP (BackwardPulse) transfers the double word value at
data input I2 to the last register field D8. The original contents of the register
fields are then moved by one field in the direction of the next lower field
numbers.
1
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
a b c d
SR...BIT
Shift Register
EN
SR...BIT
Shift Register
EN
RE
FP
FD
RE
FP
FD
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
SR...BIT
Shift Register
EN
RE
FP
FD
SR...BIT
Shift Register
EN
RE
FP
FD
1
1
0
1 1
1
0