enCoRe™ V CY7C643xx, enCoRe™ V LV CY7C604xx TRM, Document No. 001-32519 Rev *H
20
Pin Information
1.1.6
CY8C20066A, CY8CTMG200-00LTXI, CY8CTMG200A-00LTXI PSoC, CY7C64300
enCoRe V and CY7C60400 enCoRe V LV OCD 48-Pin Part Pinout
The 48-pin QFN part is for on-chip debugging (OCD). Note that this part is only used for in-circuit debugging.
It is NOT avail-
able for production
.
Table 1-6. 48-Pin OCD Part Pinout
2
Pin
No.
Digit
a
l
An
al
og
Name
Description
CY8C20066A, CY8CTMG200-00LTXI, CY8CTMG200A-00LTXI,
CY7C64300, CY7C60400 enCoRe V OCD Devices
1
OCDOE OCD directional pin
2
IO
I
P2[7]
3
IO
I
P2[5]
XTAL Out
4
IO
I
P2[3]
XTAL In
5
IO
I
P2[1]
6
IO
I
P4[3]
7
IO
I
P4[1]
8
IO
I
P3[7]
9
IO
I
P3[5]
10
IO
I
P3[3]
11
IO
I
P3[1]
12
IOHR
I
P1[7]
I2C SCL, SPI SS
13
IOHR
I
P1[5]
I2C SDA, SPI MISO
14
CCLK
OCD CPU CLK OUTPUT
15
HCLK
OCD HIGH SPEED CLK
16
IOHR
I
P1[3]
SPI CLK
17
IOHR
I
P1[1]
TC CLK
1
, I2C SCL, SPI MOSI
18
Power
Vss
Ground pin
19
IO
D+
USB PHY
20
IO
D–
USB PHY
21
Power
Vdd
Power pin
22
IOHR
I
P1[0]
TC DATA
1
, I2C SDA, SPI CLK
23
IOHR
I
P1[2]
NOT FOR PRODUCTION – OCD Part
24
IOHR
I
P1[4]
EXTCLK
25
IOHR
I
P1[6]
26
Input
XRES
Active high external reset with
internal pull down
27
IO
I
P3[0]
28
IO
I
P3[2]
29
IO
I
P3[4]
30
IO
I
P3[6]
31
IO
I
P4[0]
32
IO
I
P4[2]
Pin
No.
Digit
a
l
Analog
Name
Description
33
IO
I
P2[0]
41
Power
Vdd
Power pin
34
IO
I
P2[2]
42
OCDO
OCD even data I/O
35
IO
I
P2[4]
43
OCDE
OCD odd data output
36
IO
I
P2[6]
44
IOH
I
P0[7]
37
IOH
I
P0[0]
45
IOH
I
P0[5]
38
IOH
I
P0[2]
46
IOH
I
P0[3]
39
IOH
I
P0[4]
47
Power
Vss
Ground pin
40
IOH
I
P0[6]
48
IOH
I
P0[1]
Legend
A = Analog, I = Input, O = Output, NC = No Connection, H = 5-mA High Output Drive, R = Regulated Output Option.
1
ISSP pin which is not High-Z at POR.
2
The center pad (CP) on the QFN package must be connected to ground (V
SS
) for best mechanical, thermal, and electrical performance. If not con-
nected to ground, it must be electrically floated and not connected to any other signal.
QFN
(Top View)
P0
[1
]
Vs
s
P0
[3
]
P0
[5
]
P0
[7
]
OC
DE
OC
DO
Vd
d
P0
[6
]
P0
[4
]
P0
[2
]
P0
[0
]
10
11
12
P2[7]
OCDOE
P2[5]
P2[3]
P2[1]
P4[3]
P4[1]
P3[7]
P3[5]
P3[3]
P3[1]
P1[7]
35
34
33
32
31
30
29
28
27
26
25
36
48
47
46
45
44
43
42
41
40
39
38
37
P2[4]
P2[2]
P2[0]
P4[2]
P4[0]
P3[6]
P3[4]
P3[2]
P3[0]
XRES
P1[6]
P2[6]
1
2
3
4
5
6
7
8
9
13
14
15
16
17
18
19
20
21
22
23
24
P1[5
]
CC
LK
HC
LK
P1
[3]
P1[1
]
Vs
s
D
+
D -
Vd
d
P1[0
]
P1[2
]
P1[4
]