Cypress enCoRe V CY7C643 Series, Technical Reference Manual

Page: 140 / 257

enCoRe™ V CY7C643xx, enCoRe™ V LV CY7C604xx TRM, Document No. 001-32519 Rev *H 140
Programmable Timer
19.2.3 PT2_CFG Register
The Programmable Timer Configuration Register
(PT2_CFG) configures the enCoRe V’s programmable
timer.
Bit 2: CLKSEL. This bit determines if the timer runs on the
32-kHz clock or CPU clock. If the bit is set to 1, the timer
runs on the CPU clock, otherwise, the timer runs on the 32-
kHz clock.
Bit 1: One Shot. This bit determines if the timer runs in
one-shot mode or continuous mode. In one-shot mode the
timer completes one full count cycle and terminates. Upon
termination, the START bit in this register is cleared. In con-
tinuous mode, the timer reloads the count value each time
upon completion of its count cycle and repeats.
Bit 0: START. This bit starts the timer counting from a full
count. The full count is determined by the value loaded into
the data registers. This bit is cleared when the timer is run-
ning in one-shot mode upon completion of a full count cycle.
For additional information, refer to the PT2_CFG register on
page 185 .
19.2.4 PTx_DATA0 Register
The Programmable Timer Data Register 0 (PT0_DATA0,
PT1_DATA0, PT2_DATA0) holds the lower 8 bits of the pro-
grammable timer’s count value.
Bits 7 to 0: DATA[7:0]. This is the lower byte of a 16-bit
timer. The upper byte is in the corresponding PTxDATA1
register.
For additional information, refer to the PT0_DATA0 register
on page 183 , PT1_DATA0 register on page 183 and
PT2_DATA0 register on page 183 .
19.2.5 PTx_DATA1 Register
The Programmable Timer Data Register 1 (PT0_DATA1,
PT1_DATA1, PT2_DATA1) holds the 8 bits of the program-
mable timer’s count value for the device
Bits 7 to 0: DATA[7:0]. This is the upper byte of a 16-bit
timer. The lower byte is in the corresponding PTx_DATA0
register.
For additional information, refer to the PT0_DATA1 register
on page 182 , PT1_DATA1 register on page 182 , and
PT2_DATA1 register on page 182 .
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Access
0,B6h PT2_CFG CLKSEL One Shot START RW : 0
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Access
0,B2h PT0_DATA0 DATA[7:0] RW : 00
0,B5h PT1_DATA0 DATA[7:0] RW : 00
0,B8h PT2_DATA0 DATA[7:0] RW : 00
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Access
0,B1h PT0_DATA1 DATA[7:0] RW : 00
0,B4h PT1_DATA1 DATA[7:0] RW : 00
0,B7h PT2_DATA1 DATA[7:0] RW : 00