7-57
Register Descriptions
7:6
r/w
0
PerfectFilteringMode[1:0]
‘00’ - Perfect filtering disabled.
‘01’ - 16 perfect addresses filtering. The AIC-6915 compares the
incoming frame destination address with 16 addresses stored in
an internal SRAM, then DMA transfers the frame if there is a
match.
‘10’ - 16 perfect addresses inverse filtering. The AIC-6915
compares the incoming frame destination address with 16
addresses stored in an internal SRAM, then DMA transfers the
frame if there is not a match.
‘11’ - In VLAN mode, The AIC-6915 accepts frames that match
the first perfect address, or whose VLAN ID matches one of the
preprogrammed VLAN IDs and whose address matches one of
the other 15 perfect addresses. When not in VLAN mode, this
mode is reserved.
5:4
r/w
0
HashFilteringMode[1:0]:
‘00’ - Hash filtering disabled.
‘01’ - Hash only multicast destination addresses. In VLAN mode,
only accept matching frames if the VLAN ID also matches.
‘10’ - Hash only multicast destination addresses. In VLAN mode,
accept matching frames regardless of VLAN ID.
‘11’ - Hash all. Accept any frames that matches regardless of
VLAN.
3
r/w
0
HashPriorityEnable:
If this bit is set, the hash priority table is used
to determine the priority of frames that are accepted because of their
hash address matching.
Note:
If a frame is defined as high priority, the completion
descriptor for this frame is DMA-transferred to completion queue 2.
2
r/w
0
PassBroadcast:
When this bit is set the AIC-6915 accepts broadcast
frames. In VLAN mode, if the frame is a VLAN frame, its VLAN ID
must match one of the preprogrammed IDs.
An alternative way to accept all broadcast frames is to program the
broadcast address as one of the perfect addresses. In this case,
VLAN tag is ignored.
1
r/w
0
PassMulticast:
When set, incoming packets with multicast
addresses are received and DMA-transferred regardless of the
destination address. If VlanMode is set and the frame is a VLAN
frame, then the VLAN tag must still match one of the
preprogrammed VLAN tags for the frame to be accepted.
0
r/w
0
PromiscuousMode:
When set, all incoming packets are received
and DMA-transferred regardless of the destination address. The
address match is checked and reported in the completion descriptor.
This overrides all other bits.
Table 7-71. RxAddressFilteringCtrl Register (Continued)
Bit(s)
rw
Reset
Value
Description/Function
