Adaptec 1737100 - 62044 SGL ENET PCI 4CH, Programmer'S Manual

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6-4
AIC-6915 Ethernet LAN Controller Programmer’s Manual
Additional PCI Registers Summary
Mapped to address range 0x50FFF-0x50100 in Memory space. These registers can be
accessed using memory or indirect I/O commands.
Additional Ethernet Registers Summary
Mapped to address range 0x52000-0x54FFF in memory space. These are read/write
registers that can be accessed using Memory or indirect I/O commands. Used for
mapping Ethernet clock domain registers that are rarely accessed during run time.
Table 6-3. AIC-6915 Additional PCI Registers Summary
Byte Offset
(Hex) Register Name Comments
PCI diagnostic/CardBus registers
0100 PciTargetStatus Read only, For PCI target diagnostic purpose in
case of target abort
0104 PciMasterStatus1 Read only, For PCI master diagnostic purpose only
0108 PciMasterStatus2
010C PciDmaLowHostAddr
0110 BacDmaDiagnostic0 Read only, For BAC diagnostic purpose only.
0114 BacDmaDiagnostic1
0118 BacDmaDiagnostic2
011C BacDmaDiagnostic3
0120 MacAddr1 Data read from the serial EPROM at init time is
latched. Software can override the value.
0124 MacAddr2
0130 FunctionEvent Interrupt bit of registers required by the CardBus
standard.
0134 FunctionEventMask
0138 FunctionPresentState
013C ForceFunction
Table 6-4. AIC-6915 Additional Ethernet Registers Summary
Byte Offset
(Hex) Register Name Comments
Physical (32 devices, 128 bytes each) , starts @offset byte address 0x52000 in memory space
2000-3FFF External Physical devices MII Register Access port
General Ethernet registers , starts @offset byte address 0x54000 in memory space
4000 TestMode
4004 RxFrameProcessorCtrl
4008 TxFrameProcessorCtrl
4010-4FFF Reserved
MAC registers , starts @offset byte address 0x55000 in memory space
5000 MacConfig1
5004 MacConfig2
5008 BkToBkIPG