3-10
AIC-6915 Ethernet LAN Controller Programmer’s Manual
Transmit Completion Queue Entry
Transmit Completion Queue entries consist of two types: DMA Complete Entry and
Transmit Complete Entry, differentiated by the MSB of the entry. Three bits are defined in
the “Type” field because the AIC-6915 always returns a nonzero value in the DMA
Complete Entry. Each Transmit Completion Queue Entry can be programmed as either
4 bytes or 8 bytes.
■
Type - 3 bit. Always 3’b100 for DMA Complete Entry.
■
Time Stamp - 13 bits. These are the 13 least significant bits of the 32-bit timer. These
bits are sampled when the completion descriptor is formed after the complete DMA-
transfer of the whole frame from host memory.
■
Pri - 1 bit. Indicates a high- or low-priority queue.
■
Index - 15 bits. Descriptor Queue Consumer Index points to the beginning of a
packet in the Descriptor Queue. Its an 8 byte index, incremented by 1 every 8 bytes.
If the buffer/frame descriptor has a Skip field, the index points to the beginning of
the Skip field.
Table 3-6. Type 4 Transmit DMA Descriptor (32-bit Addressing only)
31 24
23 16
15 8
7 0
Skip Field (multiple of 8 bytes)
One Skip Field per Packet
ID =
4’b1011
I
N
T
R
E
N
D
C
A
L
T
C
P
C
R
C
E
N
Reserved
Reserved
Reserved
Number Of Tx Buffers
First Buffer Length
Total Packet Length
First Buffer Address
Last Buffer Length
Reserved
Last Buffer Address
Table 3-7. Transmit Completion Queue Entry Type = DMA Complete Entry
31
29 28
16 15 14
0
Type
Time Stamp
Pr
i
Index
